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aignacio / cocotbext-ahb

Cocotb AHB Extension - AHB VIP
https://github.com/aignacio/cocotbext-ahb
MIT License
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behavior mismatch between icarus and verilator #1

Closed Thomasb81 closed 1 year ago

Thomasb81 commented 1 year ago

Hello

with https://github.com/verilator/verilator/pull/4618 I am able to run cocotbext-ahb with verilator.

While with icarus the testsuite is 100% pass. It is not the case with verilator.

DUT=ahb_template SIM=verilator TIMEPREC=1ps TIMEUNIT=1ns TESTCASE=run_test_001 WAVES=1 EXTRA_ARGS="--trace-fst --trace-structs" RANDOM_SEED=1699724551  pytest tests/test_ahb_lite_sram_no_errors.py
INFO     cocotb:simulator.py:302  39910.00ns INFO     ..ask 2.AHBMonitor._mon_master_txn Test stopped by this forked coroutine
INFO     cocotb:simulator.py:302  39910.00ns INFO     cocotb.regression                  run_test_001 failed
INFO     cocotb:simulator.py:302                                                         Traceback (most recent call last):
INFO     cocotb:simulator.py:302                                                           File "/home/tom/verilator/env/lib/python3.11/site-packages/cocotbext/ahb/ahb_monitor.py", line 61, in _mon_master_txn
INFO     cocotb:simulator.py:302                                                             self._check_signals(stable_signals)
INFO     cocotb:simulator.py:302                                                           File "/home/tom/verilator/env/lib/python3.11/site-packages/cocotbext/ahb/ahb_monitor.py", line 168, in _check_signals
INFO     cocotb:simulator.py:302                                                             raise AssertionError(
INFO     cocotb:simulator.py:302                                                         AssertionError: AHB PROTOCOL VIOLATION: Master.hsel signal should not change before slave.hready == 1
INFO     cocotb:simulator.py:302  39910.00ns INFO     cocotb.regression                  ***************************************************************************************************
INFO     cocotb:simulator.py:302                                                         ** TEST                                       STATUS  SIM TIME (ns)  REAL TIME (s)  RATIO (ns/s) **
INFO     cocotb:simulator.py:302                                                         ***************************************************************************************************
INFO     cocotb:simulator.py:302                                                         ** test_ahb_lite_sram_no_errors.run_test_001   FAIL       39910.00           1.42      28188.09  **
INFO     cocotb:simulator.py:302                                                         ***************************************************************************************************
INFO     cocotb:simulator.py:302                                                         ** TESTS=1 PASS=0 FAIL=1 SKIP=0                           39910.00           1.49      26735.83  **
INFO     cocotb:simulator.py:302                                                         ************************************************************************************************

Some seed of this test are passing.

Thing remarkable is that the failure occured on last write item before the read and it seems related to back pressure feature...

Thomasb81 commented 1 year ago

By instrumenting https://github.com/aignacio/cocotbext-ahb/blob/4b8262ed63cc8f0721b9819a31c7638e57a6ae61/cocotbext/ahb/ahb_monitor.py#L47

For icarus:

cocotb:simulator.py:302  39910.00ns INFO     ..b.ahb_monitor.slave.ahb_template comparaison prev hsel: 1 vs current hsel: 1
INFO     cocotb:simulator.py:302  39910.00ns INFO     ..b.ahb_monitor.slave.ahb_template current hready: 1
INFO     cocotb:simulator.py:302  39920.00ns INFO     ..b.ahb_monitor.slave.ahb_template comparaison prev hsel: 1 vs current hsel: z
INFO     cocotb:simulator.py:302  39920.00ns INFO     ..b.ahb_monitor.slave.ahb_template current hready: 0

On below waveform gtkwave show that at time 33910 ns hsel is not at at 1 but at z. While cocotb sample hsel at 1 with hready at 1 : assertion does not rise.

image

For verilator:

INFO     cocotb:simulator.py:302  39910.00ns INFO     ..b.ahb_monitor.slave.ahb_template comparaison prev hsel: 1 vs current hsel: 0
INFO     cocotb:simulator.py:302  39910.00ns INFO     ..b.ahb_monitor.slave.ahb_template current hready: 1
INFO     cocotb:simulator.py:302  39920.00ns INFO     ..b.ahb_monitor.slave.ahb_template comparaison prev hsel: 1 vs current hsel: 0
INFO     cocotb:simulator.py:302  39920.00ns INFO     ..b.ahb_monitor.slave.ahb_template current hready: 0

On below waveform gtkwave show that at time 33910 ns hsel is at 0. hsel has change while hready is still at 1 : assertion rise.

image

aignacio commented 1 year ago

Hey @Thomasb81, the issue is related to the way the different simulators work, seems related to the VPI event and how it gets the values while sampling the AHB bus signals in the AHBMonitor. Fixed by sampling on the Falling Edge which works for most of typical use cases, this class is still a WIP so I plan to move to the BusMonitor in the future. Update

Thomasb81 commented 1 year ago

Hi

I have similar issue to drive signals on rtl. For which I hack https://github.com/aignacio/cocotbext-ahb/blob/master/cocotbext/ahb/ahb_master.py this way:

    await RisingEdge(self.clk)
    await Timer(1,"ns")

Some time people wait a 0 time to work-arround this. It have the side effect to give the opportunity to simulator to execute other statement then after execute local statement. But I did not try that. Having a real delay allow to stick to spec waveform, where we see precisely event succession :

  1. clock edge rise
  2. bus signal toggle

image

But the drawback is the VIP become frequency dependent, this hard-coded delay in the VIP may be an issue if you need to simulate back-annotate design.

I did not look at https://github.com/cocotb/cocotb-bus/blob/2c846dca8d3293b7676c70dd51dbc9c7f51029f0/src/cocotb_bus/monitors/__init__.py#L145