question about test_irqs

[sfyhhh]

Hi, @aignacio, I have carefully read most of the code throughout the project, but there are some questions as follows:

1. In _testirqs.py, why use bytearray(str(2 32),'utf-8') to configure IRQ_RD_MASK** CSR?
2. I originally thought that IRQ_RD_MASK functions as follows, and I use MUX_FULL_FLAGS and take NumVirtChn=3 as an example

   FULL_FLAG & IRQ_RD_MASK = IRQS_OUT
   111       & 101         = 101

   But in _axicsr.sv, I find that each bit of full_rd_bff_i does AND with the entire IRQ_RD_MASK. If the LSB of IRQ_RD_MASK is 0, then the output of IRQS_OUT is 0, which seems different from my understanding.

   input   [NumVirtChn-1:0]                  full_rd_bff_i;
   logic [31:0] irq_mask_ff;
   unique case(irq_mux)
     MUX_FULL_FLAGS: begin
       for (int i=0;i<NumVirtChn;i++) begin
         irqs_out_o.irq_vcs[i] = full_rd_bff_i[i] & irq_mask_ff;
       end
     end

   3.There's a sentence in the introduction to IRQs, "When the MUX is selected to IRQ_PULSE_HEAD_FLIT, the IRQ needs to be acknowledged by writing 0x00 into the IRQ_PULSE_ACK CSR."But I don't find any code in _axicsr.sv to determine if writing IRQ_PULSE_ACK is 0x00. It seems that just axi_awaddr=IRQ_PULSE_ACK will enable PULSE_HEAD_FLIT case because ack_irq_ff will set to 0.

4.in _inputdatapath.sv,full_o appears to be connected to the output of multiple instantiation modules

5.How does the parameter NOC_CFG[] in constants.py modify the parameter in _ravenocdefines.svh? For example

NOC_CFG_COFFEE['flit_data_width'] = 64 #from  constants.py
  `ifndef FLIT_DATA_WIDTH
    `define  FLIT_DATA_WIDTH      32  
  `endif # from ravenoc_defines.svh

Which part of the code associates the parameters of NOC_CFG[] with the various macro definitions in _ravenocdefines.svh?

Please forgive that there may be some questions that I have not considered carefully, and Thank you for your selfless dedication!

[aignacio]

Hey @aisfyhhh,

I'm sick atm but I'll try to answer your questions.

1.In test_irqs.py, why use bytearray(str(2 ** 32),'utf-8') to configure IRQ_RD_MASK CSR?

I believe it is because the AXI library I'm using there requires bytearray as input argument for the data and the register is 32-bit type.

2.I originally thought that IRQ_RD_MASK functions as follows, and I use MUX_FULL_FLAGS and take NumVirtChn=3 as an example...

Well noted, actually I believe there's a problem there. I'll try to take a look once I've recovered. It should be a simple fix.

3.There's a sentence in the introduction to IRQs, "When the MUX is selected to IRQ_PULSE_HEAD_FLIT, the IRQ needs to be acknowledged by writing 0x00 into the IRQ_PULSE_ACK CSR."But I don't find any code in axi_csr.sv to determine if writing IRQ_PULSE_ACK is 0x00. It seems that just axi_awaddr=IRQ_PULSE_ACK will enable PULSE_HEAD_FLIT case because ack_irq_ff will set to 0.

You are correct, writing any value would ack this IRQ type, IIRC there was a plan to map value 0x00 but I didn't see any point on adding it. I'll update the documentation.

4.in input_datapath.sv,full_o appears to be connected to the output of multiple instantiation modules

Seems like a multi-driver issue, will keep track to fix too.

5.How does the parameter NOC_CFG[] in constants.py modify the parameter in ravenoc_defines.svh? For example

So, the NOC_CFG[] is a dictionary that holds all the different configuration sets. The way that I updated or overwritten the defines happens through a mix of cocotb+pytest in this order.

1. The configuration set is defined at the constants.py
2. The variable regression_setup defines which configuration sets are picked to be tested.
3. For example in this test here flavor gets populated with the individual dictionaries (configuration set) that were part of the list selected in the step before. Pytest will automatically re-run the test with the different flavors in this list. In this fn call, the fn returns a set of defines that will overwrite the default parameters with -Dxxxx=yyyy..., this is fwd to the cocotb_test.simulator run method.

Task list before closing the issue:

• [ ] Fix IRQ mask to map individual bits to each correspondent virtual channel
• [ ] Update documentation w.r.t to IRQ type == IRQ_PULSE_HEAD_FLIT as mentioned by @aisfyhhh
• [ ] Fix multi-driver issue on full/empty_o in the input datapath

[sfyhhh]

Thank you for your patient responses. I hope you recover soon.