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aignacio / ravenoc

RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications
MIT License
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Why is IRQ needed？ #7

Closed Elena32061 closed 2 years ago

Elena32061 commented 2 years ago

Hello sir, I am studying ravenoc project.Thank you for your selfless disclosure of your work, it has been a valuable learning resource for me. I don't understand what IRQ does, can you please explain a little more?It appears in the axi csr file and in the axi slave interface file and it confuses me。 Why is IRQ needed？Is it a signal to send an interrupt request to the CPU? what is the meaning of IRQ_Mask and IRQ_Mux？

aignacio commented 2 years ago

Hi @Elena32061, great that this project can help you somehow, about the IRQ, it's basically to send interrupts to a DMA/CPU as you mentioned in your question. Mask is a register for you to mask the IRQs if you don't want to receive specific interrupts let's say you have 3x VCs and you only want the CPU to wake up when VC#0 receives a packet. The mux drives the source of the interrupt which can be the different options as mentioned in the README like full flag or empty buffer, etc... there's a specific test here for this, I think by reading the test you might get a better idea of what that means...

Elena32061 commented 2 years ago

Thank you😊