Open MikeWalrus opened 2 years ago
Verilator complains about circular logic in several places. I believe most of them are false positive, but I'm not sure about this one, thread_trans_start: https://github.com/alexforencich/verilog-axi/blob/25912d48fec2abbf3565bbefe402c1cff99fe470/rtl/axi_crossbar_addr.v#L292
thread_trans_start
Verilator complains about circular logic in several places. I believe most of them are false positive, but I'm not sure about this one,
thread_trans_start: https://github.com/alexforencich/verilog-axi/blob/25912d48fec2abbf3565bbefe402c1cff99fe470/rtl/axi_crossbar_addr.v#L292