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alexforencich / verilog-axi

Verilog AXI components for FPGA implementation

MIT License

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about axi_ram #73

Open nViol3t opened 6 months ago

nViol3t commented 6 months ago

Hi sir, I want to use cocotb-axi to simulate the axi_ram module and I changed mem to output, but I cannot see the mem waveform in the .fst file.I would be appriciated to if you could tell me how to solve this problem，thank you.

alexforencich commented 6 months ago

2D arrays don't always get included in the dump file. I think this is simulator-dependent. If I need to monitor a few select locations, I'll add some wires that mirror those memory locations so they'll be included in the dump.

nViol3t commented 6 months ago

ok,i'll try ,thank you