alexforencich / verilog-axis

Verilog AXI stream components for FPGA implementation
MIT License
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arbiter module renaming #20

Open olofk opened 1 year ago

olofk commented 1 year ago

Hi,

I'm using your core in a larger code base which has another module called arbiter which is a bit tricky to handle nicely. Would you consider renaming the one here to something like verilog_axis_arbiter?