alexforencich / verilog-axis

Verilog AXI stream components for FPGA implementation
MIT License
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Rename arbiter module to verilog_axis_arbiter #21

Open olofk opened 1 year ago

olofk commented 1 year ago

arbiter is a reasonably common module name. Avoid namespace collisions by prefixing it with verilogaxis

alexforencich commented 1 year ago

It's a sensible idea, but I don't like the prefix verilog_axis_. Yes, I suppose it is the name of the repo, but pretty much everything else in the repo has the prefix axis_. And axis_arbiter is problematic because the arbiter doesn't really have anything in particular to do with AXI stream.