Python version < 3.3 compatibility

alexforencich / verilog-axis

Verilog AXI stream components for FPGA implementation

MIT License

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Python version < 3.3 compatibility #3

Closed caryan closed 9 years ago

caryan commented 9 years ago

log2 was only introduced in Python 3.3
ceil returns float in Python 2
print is not a function in Python 2

alexforencich commented 9 years ago

This is far more complicated than it needs to be. Simpler fix pushed.

caryan commented 9 years ago

That's certainly cleaner for the ceil and log2. Could we keep the

from __future__ import print_function

I know it's ugly but we're stuck on python2 for other silly reasons.

alexforencich commented 9 years ago

Ah, I forgot about the prints to stderr. I will fix that momentarily.

alexforencich commented 9 years ago

Are you using the MyHDL testbenches at all? I tried to get these to support Python 2 as well as Python 3, but ran in to some strange issues. So right now they only support Python 3.

caryan commented 9 years ago

Thanks for all your quick fixes. I'm actually instantiating these in VHDL design but I'll have a look at the testbenches.