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alexforencich / verilog-ethernet

Verilog Ethernet components for FPGA implementation
MIT License
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frame_min_count was never updated, so padding was not working #168

Closed renardo18 closed 10 months ago

renardo18 commented 1 year ago

A line of code was forgotten, causing frame_min_count_reg to never be updated, thus padding was never starting.

alexforencich commented 1 year ago

Good catch, the transfer to the reg definitely got missed. However, the reset is not necessary as the signal is set in the idle state.

Do you want to update the PR, or should I just go ahead and add that line myself?

renardo18 commented 1 year ago

Just go ahead and add it yourself. Thank you !

Le dim. 24 sept. 2023, 03:48, Alex Forencich @.***> a écrit :

Good catch, the transfer to the reg definitely got missed. However, the reset is not necessary as the signal is set in the idle state.

Do you want to update the PR, or should I just go ahead and add that line myself?

— Reply to this email directly, view it on GitHub https://github.com/alexforencich/verilog-ethernet/pull/168#issuecomment-1732512462, or unsubscribe https://github.com/notifications/unsubscribe-auth/AQ37SX3UEQBJDGCEVYBUL7LX37QU5ANCNFSM6AAAAAA5BY4PIU . You are receiving this because you authored the thread.Message ID: @.***>

alexforencich commented 1 year ago

OK, this should be fixed in the repo now.