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alexforencich / verilog-pcie

Verilog PCI express components
MIT License
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Implementation of the TL and DL functions of the PCIE protocol #51

Open KavinGarnet opened 1 month ago

KavinGarnet commented 1 month ago

Hi Alex, Is there RTL code in this project that implements the functionality of the Transaction Layer (TL) and Data Link Layer (DL) of the PCIe protocol?？ thank you very much, KavinGarnet

alexforencich commented 1 month ago

Not currently; most FPGAs have hard logic that implements this, so there has not been a need to reinvent the wheel.