search

alexforencich / xfcp

Extensible FPGA control platform
MIT License
52 stars 20 forks source link

xfcp + pcie #1

Open np84 opened 3 years ago

np84 commented 3 years ago

Hi Alex! Just found your verilog-pcie and wonder if you have planned to integrate it into xfcp? Best, Nico

alexforencich commented 3 years ago

The thought has crossed my mind, but there are a lot of question marks. What's the best interface on the PCIe side - xfcp is streaming, PCIe is memory-mapped, so it's not clear the most reasonable interface for that. One option is a FIFO interface, with a register to enqueue bytes for TX and a register to dequeue bytes for RX. But since the protocol is packetized, this seems like it cause some problems if not implemented correctly. I suppose another technique could be scratch RAM...write the packet into RAM, then write the length somewhere else. More complex, but I suppose it would also work. Or I could use corundum to provide streaming packet DMA, which is totally overkill. And then there is the question of the driver, and what sort of interface it would expose to python, etc.