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alfikpl / ao486

The ao486 is an x86 compatible Verilog core implementing all features of a 486 SX.
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Nios II / main.cpp #6

Open MasterJerryZh opened 6 years ago

MasterJerryZh commented 6 years ago

Hello alfikpl! I hava noticed that "memcpy(dst_ptr, sector_buf, current_size);" in main.cpp line 291! I also viewed the java source code SDGenerator.java. I found the address "dst_ptr" would equal 0xF0000(BIOS) and 0xC0000(VGABIOS) when Nios application was ran. 0xF0000 and 0xC0000 were writed to file sd.dat through SDGenerator.java! Nios II will copy Bios and VGABios from SD card to location that are pointed by 0xF0000 and 0xC0000. SDRAM's address map region is 0x0800_0000-0x0bff_ffff. They are not in SDRAM. So, how can the ao486 run Bios and VGABios? Can it find and run Bios and VGABios at address 0xF0000 and 0xC0000? Best regards, Jerry Zh.

alfikpl commented 6 years ago

Hello MasterJerryZh,

You are correct - the NIOS II data master has the SDRAM on 0x0800_0000, so the Bios and VGABios addresses at 0xF0000 and 0xC0000 are not directly addressable.

I don't remember did I do this on purpose or by accident. I remember that I was experiencing with the address decoding in the Qsys generated modules (nowadays Platform Designer). I was interested what happens to the transactions that miss all entries in the address map of a given Avalon master.

Luckily, in the case of the NIOS II data mater, the transactions that miss all the entries are directed to SDRAM. I checked this today, on the Intel Quartus Prime Lite 17.1.0. I think the same behaviour was manifested in the earlier versions of Quartus.

Best regards, Aleksander Osman.