Cache Replacement Perceptron

All features XORed with PC to hash 1) PCi shifted right by 2, for i = 0. 2) The three values of PCi shifted right by i, for 1 ≤ i ≤ 3. 3) The tag of the current block shifted right by 4, 4) The tag of the current block shifted right by 7

Block size = 64 = 5b Sets = 2048 = 11b Tag = 64 - 11 - 5 = 48b if sets 512 = 9b, tag = 50b

each table with 256 entries of 6-bit signed weights (ranging in value from -32 to +31) is sufficient

prediction bit - an extra bit on each cache block re-computed on hits on miss, compute prediction, if predicted reuse - add block - set prediction bit scan set for replacement block with a prediction as no-reuse, else use pseudo-LRU incoming block predicted as dead bypasses the cache.

prefetch uses a single fake address for hashing

SAMPLER: partial tag 15b - lower integer sum y_out input feature hashed used to index tables LRU bits 16 way set associative 64 sampler sets on each cache check, check if it is in the sampler using a tag match no benefit from letting a tag “bypass” the sampler,i.e., tags from all accesses to sampled sets are placed into the sampler.

in sampler set => set_index % (num_sets/sampler_set_size) => set_index % (2048/64) => set_index % 32 == 0 set in sampler = set_index / 32 Once set found, check-in set for a partial tag match and if the sampler is valid if not match in a sampler, evict in the sampler

THRESHOLDS: τ_bypass for predicting whether a block should be bypassed, τ_replace for predicting whether a block may be replaced after a hit τ_bypass = 3, τ_replace = 124 θ = 74

amithgopi / CPU-Branch-Prediction-and-Cache-Replacement-using-ML-and-RL

Cache Replacement Perceptron #5