Closed tfcollins closed 5 months ago
Clock sources are incorrect for ADRV9002 when moving to hdl_2021_r1. Since the clocking is split now between RX and TX there needs to be better handling before it can be enabled
Clock sources are incorrect for ADRV9002 when moving to hdl_2021_r1. Since the clocking is split now between RX and TX there needs to be better handling before it can be enabled