If the port names for the data valid input and outputs are the same HDL coder ends up connecting cpack/fifo_wr_en to axi_ad9361/adc_valid_i0 directly, bypassing the custom IP entirely. Whilst this is likely a bug in how HDL coder handles inserting the custom IP an easy fix is to just use unique names for the ports.
If the port names for the data valid input and outputs are the same HDL coder ends up connecting
cpack/fifo_wr_en
toaxi_ad9361/adc_valid_i0
directly, bypassing the custom IP entirely. Whilst this is likely a bug in how HDL coder handles inserting the custom IP an easy fix is to just use unique names for the ports.