ad9081: common: ad9081_fmca_ebz_bd: Fix ad_mem_interconnect clock - Githubissues

analogdevicesinc / hdl

HDL libraries and projects

https://wiki.analog.com/resources/fpga/docs/hdl

Other

1.54k stars 1.52k forks source link

ad9081: common: ad9081_fmca_ebz_bd: Fix ad_mem_interconnect clock #1487

Open bluncan opened 1 month ago

bluncan commented 1 month ago

PR Description

The ad_mem_hp1_interconnect for rx_dma was set to $sys_cpu_clock instead of $sys_dma_clock

PR Type

[x] Bug fix (change that fixes an issue)
[ ] New feature (change that adds new functionality)
[ ] Breaking change (has dependencies in other repos or will cause CI to fail)

PR Checklist

[x] I have followed the code style guidelines
[x] I have performed a self-review of changes
[x] I have compiled all hdl projects and libraries affected by this PR
[ ] I have tested in hardware affected projects, at least on relevant boards
[ ] I have commented my code, at least hard-to-understand parts
[x] I have signed off all commits from this PR
[ ] I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
[ ] I have not introduced new Warnings/Critical Warnings on compilation
[ ] I have added new hdl testbenches or updated existing ones

bluncan commented 1 week ago

RetriggerCI