Closed leoreyesth closed 1 year ago
Hi @leoreyesth , the documentation is incorrect. Table 6-5 has incorrect settings that have been revised in the latest revision of the ME21 User Guide as well as procedure steps 1-3. However, the revised user guide will not be available until it is published.
Please see this corrected AF selection table:
As for the order to set the EN bits, I recommend setting EN0 first. This will put the GPIO into I/O mode and prevent glitches from occurring when setting the other EN bits. Not setting EN0 first may cause the GPIO to enter unintended AFs, causing potential glitches.
I recommend this procedure for setting AF EN bits:
MXC_GPIO_RevA_SetAF() should be modified to use this register write order to ensure glitch-less transition from AF to AF.
The MXC_GPIO_RevA_SetAF() function needs to be updated to match the data from the User Guide.
I think that there is a typo on the procedure to select an alternate function. Step 3 it should reference table 6-5. If this is the case the procedure should be the following: 1 - Set the transition acording to table 6-6 2 - Optional: Configure the electrical characteristics of the pin. 3 - Set the GPIO Mode acording to table 6-5
Is this procedure correct?
This steps require to modify three different registers. Is there a specific order to follow or the order doesn't matter?