There's a new note about clock selection in Rev 4 of the MAX32670 UG (See section 13.4)
In the past, the settings for the "A" timer were assumed to propagate through to the "B" timer in 32-bit cascade mode. It seems like there was a bug, so now we should match the clock selection for A/B on initialization to ensure proper operation in the 32-bit modes.
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Description
Closes #823
There's a new note about clock selection in Rev 4 of the MAX32670 UG (See section 13.4)
In the past, the settings for the "A" timer were assumed to propagate through to the "B" timer in 32-bit cascade mode. It seems like there was a bug, so now we should match the clock selection for A/B on initialization to ensure proper operation in the 32-bit modes.
Checklist Before Requesting Review