To disable the OTP for low power applications, there needs to be a 20HCLK cycle delay after the OTP controller powers down (OTP_CLKDIV.pd) and before the OTP peripheral clock is disabled.
Needs to be tested for ME55A2 LP measurements.
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Description
To disable the OTP for low power applications, there needs to be a 20HCLK cycle delay after the OTP controller powers down (
OTP_CLKDIV.pd
) and before the OTP peripheral clock is disabled.Needs to be tested for ME55A2 LP measurements.
Checklist Before Requesting Review