adrv9009 parser

[liambeguin]

small rework of the already existing PR #18.

I'm not really sure about the cli part or how we want to do that part, but it gave me something to test with. I'm happy to rework this more, and take over the cleanup part.

[tfcollins]

Will review when back in the office. We are out this week (and some of next). Thanks for the PR :)

[liambeguin]

For some of these parameters (mostly for jesd204), it seems like the DT has to match what is set in the vivado project.

Would it be possible to expose those in axi registers, and have the driver read them during the probe? I know that these have to be set for different drivers i.e. the FPGA cores and the 9009 for example, but wouldn't that be easier now with the jesd204-fsm code?

[tfcollins]

For some of these parameters (mostly for jesd204), it seems like the DT has to match what is set in the vivado project.

Would it be possible to expose those in axi registers, and have the driver read them during the probe? I know that these have to be set for different drivers i.e. the FPGA cores and the 9009 for example, but wouldn't that be easier now with the jesd204-fsm code?

Yes a big chunk of the JESD config is defined at synthesis time but its not globally true. We tend to give as much detail about the hardware in the devicetree as practical so things are not ambiguous. Having all this information available beforehand is useful for other debugging in the system as well. Technically you can also bring up a design without JESD cores in the FPGA (possibly existing somewhere else) and you would still need this information to perform some tasks.

[liambeguin]

Yes a big chunk of the JESD config is defined at synthesis time but its not globally true

I see, that makes more sense now.

It can get a bit hard to wrap your head around all these configurations, and which tool to use for which parameters. Hopefully with this, we can try to automate some of that process, and help others too :)

[liambeguin]

@tfcollins, I updated the original code with your suggestion using eval and adding --board to the global cli context.

This also adds:

• a parser for the ad9528 Profile wizard output
• a basic parser for the talise_config.c file from the TES application
  • I tried using something like pycparser, but I didn't find it much simpler than this implementation.

Your original commit was marked as WIP, were there other changes you wanted to make? I could have a look at that, or just drop [WIP].

I'm not totally convinced by the profile2dt name, if someone has a better suggestion I'll take it. Not the most important thing though..