Closed rygorous closed 3 years ago
That is a very useful suggestion. I implemented it a bit differently in https://github.com/andreas-abel/uiCA/commit/9562fe443d6e02c928dadb6664cffd511f0f8e40 so that essentially the same information does not have to be computed in two different places. So I'm closing this pull request. But thanks for the effort anyway!
In my testing, this has now several times been the cause for otherwise hard-to-understand DSB->MITE switches on SKL derivatives, especially with the "both halves of the 64B cache line need DSB entries" rule, so it seems worth pointing out the relevant branches in the output.
This involves keeping track of addresses when setting up the TableLineData and checking whether branches or fused pairs fulfill the conditions for the Jcc erratum.