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angelus9 / AI-Robotics

The vision of this group is to create a Forth based AI Computer where you can communicate with the system using an English conversational approach. We will add many high level Words for string manipulation, arrays, and other structures as we develop this computer. We will extend Forth to include AI words too. All of this will be built into FPGAs which are really parallel computers written in Behavioral System Verilog (the Assembler).
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Simulated Outer Interpreter #10

Open PythonLinks opened 1 year ago

PythonLinks commented 1 year ago

Semester is wrapping up, and rather than focusing on finishing up my lab assignments, my mind is on this software. The question is how to get started? The easiest way is with a simulator. It would be great if I could fire this up in iVerilog or verilator and use it as a Forth interpreter. I am not quite sure how to do that. Presumably I would have to talk to the serial interface from some other program. A web search gives me PyVerilator.

This package provides a wrapper to generate and use verilator hardware models in python.

https://pypi.org/project/PyVerilator/

So I should be able to connect Python to verilog. And then this would make it easy to run an outer interpreter on top of your simulated chip, or call a bunch of Forth test programs on it.

Any guidance would be most appreciated. What are you currently doing?

chochain commented 1 year ago

If open to scripting language, Tcl, the major language for FPGA simulation, might be an useful option. see https://www.youtube.com/watch?v=M4go2MSLrnw Also, using Expect, a Tcl extension, to interact with console/terminal is a powerful way for automation.

PythonLinks commented 1 year ago

Thank you. I did not know anything about Tcl, so that was very helpful. While I am Python centric, I am not averse to using Tcl for a terminal emulator. Looks like I will need to learn it anyhow. The bigger question is where are the testing tools? I will post more in a minute, under a new issue.