The vision of this group is to create a Forth based AI Computer where you can communicate with the system using an English conversational approach. We will add many high level Words for string manipulation, arrays, and other structures as we develop this computer. We will extend Forth to include AI words too. All of this will be built into FPGAs which are really parallel computers written in Behavioral System Verilog (the Assembler).
So I am making progress in understanding this cpu.
It uses memory to represent the stack. So for example, here is the _dup command to duplicate the top of stack.
_dup : begin
++dp;
data_stack[dp] = data_stack[dp-1];
I believe what the microcore does is cache the top of stack (TOS) and the Next of stack (NOS) in a register. Maybe that is faster, because accessing memory takes two operations, one to write the address, the other one to read the data.
I am still not very clear on all of this. A good area to pracice. It is a very important topic. One of the advantages of Forth CPUs are the faster context switching times. On a register machine, on a context switch, all of the registers need to be swapped out, and swapped back in. On the NicroCore just the two cached TOS and NOS need to be swapped, which can be done in 4 clock cycles. Two out, and two in.
Maybe it is even possible to have copies of the TOS and NOS in both a register and in RAM, in which case a context switch would only take 2 clock cycles to swap in the two values of the stack.
In any case, using memory for the stack is the right way to get started. An interesting optimization is to cache the TOS and NOS.
So I am making progress in understanding this cpu. It uses memory to represent the stack. So for example, here is the _dup command to duplicate the top of stack.
I believe what the microcore does is cache the top of stack (TOS) and the Next of stack (NOS) in a register. Maybe that is faster, because accessing memory takes two operations, one to write the address, the other one to read the data.
I am still not very clear on all of this. A good area to pracice. It is a very important topic. One of the advantages of Forth CPUs are the faster context switching times. On a register machine, on a context switch, all of the registers need to be swapped out, and swapped back in. On the NicroCore just the two cached TOS and NOS need to be swapped, which can be done in 4 clock cycles. Two out, and two in.
Maybe it is even possible to have copies of the TOS and NOS in both a register and in RAM, in which case a context switch would only take 2 clock cycles to swap in the two values of the stack.
In any case, using memory for the stack is the right way to get started. An interesting optimization is to cache the TOS and NOS.