The vision of this group is to create a Forth based AI Computer where you can communicate with the system using an English conversational approach. We will add many high level Words for string manipulation, arrays, and other structures as we develop this computer. We will extend Forth to include AI words too. All of this will be built into FPGAs which are really parallel computers written in Behavioral System Verilog (the Assembler).
I really like that you define the forth words in Verilog. I did not know that was possible. EP 16/24/32 uses a meta compiler, written if Forth. For embedded systems a meta compier is needed, but for FPGA's, your approach makes more sense. Your approach is much easier to understand I think.
Of course it look a bit tedious to do all of that typing. It would be easier to make changes if you could just have a file with Forth words in it, and then a python script to convert it to the required verilog. The forth program could then also be used in a Python simulator of your cpu.
Maybe some day I will write all of this. I find all of this stuff fascinating.
In other news, I started a master's program in EE Digital Design is Silesian Polytechniccal University, so I am quickly learning how to write Verilog. So different from writing computer programs.
And thank you for the Video at ForthDays2022 explaining how this chip works. Hugely helpful.
I really like that you define the forth words in Verilog. I did not know that was possible. EP 16/24/32 uses a meta compiler, written if Forth. For embedded systems a meta compier is needed, but for FPGA's, your approach makes more sense. Your approach is much easier to understand I think.
Of course it look a bit tedious to do all of that typing. It would be easier to make changes if you could just have a file with Forth words in it, and then a python script to convert it to the required verilog. The forth program could then also be used in a Python simulator of your cpu.
Maybe some day I will write all of this. I find all of this stuff fascinating.
In other news, I started a master's program in EE Digital Design is Silesian Polytechniccal University, so I am quickly learning how to write Verilog. So different from writing computer programs.
And thank you for the Video at ForthDays2022 explaining how this chip works. Hugely helpful.