Open JZJisawesome opened 5 months ago
UART0 used for commands / to control LETC from the ARM core
UART1 used for serial communication directly with RISC-V kernel on LETC
But we need to design a protocol for UART0 communication, as well as figure designing both host and ARM software as well
When loading to DRAM for LETC to use, WE MUST BE SURE ARM caches are flushed so the RISC-V core actually sees the data!
UART0 used for commands / to control LETC from the ARM core
UART1 used for serial communication directly with RISC-V kernel on LETC
But we need to design a protocol for UART0 communication, as well as figure designing both host and ARM software as well