Open kaby76 opened 1 month ago
The same is true for the Verilog and SystemVerilog grammars. I had created a pull request (#3353) to address this issue following our conversation (#3348). It's been marked as draft for a long time. Should I specify one grammar name in the desc.xml
for these three grammars and be done with it? (Edit: desc.xml
of the Verilog grammars look OK)
Yes the desc.xml should be updated. But I am still not quite ready with https://github.com/kaby76/Trash/pull/486 and https://github.com/antlr/grammars-v4/pull/4246. They fix a number of problems but antlr 4.13.2 broke python3_12_1.
In the latest version of trgen, a grammar that has two or more top-level grammars cannot work without specifying in the desc.xml to pick one.
In glsl, there is a parser grammar and a parser grammar for a preprocessor. At the moment, the tester cannot pipeline parsers together, i.e., take output of preprocessor and pass to post-preprocessor parser. The desc.xml must specify
<grammar-name>GLSL</grammar-name>
.