antmicro / fastvdma

Antmicro's fast, vendor-neutral DMA IP in Chisel
https://antmicro.github.io/fastvdma/
Apache License 2.0
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Documentation for use as AXI4 Stream target #18

Open p-owens opened 2 years ago

p-owens commented 2 years ago

Hi, Is there/can you provide documentation on how to use the DMA Controller as a target for an AXI4-Stream. In this case, I am using the DMA controller in Renode. I am streaming data to the AXI4-Stream input interface of the VDMA. I want to direct this data to a memory peripheral on the system bus. How can this be achieved?

I have seen the axi.robot example file where the VDMA is configured to do a block transfer. Configuring the VDMA writer the same way as in this example does not transfer any data to the memory peripheral. From looking at the waveforms of the VDMA the stream data is reaching the TDATA input of the VDMA and there is one data value present on the w_data port of the VDMA however, this value is not sent on the system bus nor are any other values present on the w_data port on the writer.

Can you please advise? Regards

kgugala commented 2 years ago

Hi @p-owens,

you need to do a few things here:

  1. Configure the FVDMA to accept AXI Stream on the input
  2. Have the Full AXI/or Wishbone bus connected to a system bus to be able to access the memory (you need to use AXI wrapper if you use Renode)
  3. run some software that will configure the DMA core to do the transfer, provide buffer etc (there are Linux drivers for the DMA you can reuse https://github.com/antmicro/linux-xlnx/tree/fastvdma-demo/drivers/dma/fastvdma)

With all the above in place you should be able to use the core with AXI Stream.

Can you share the waveform you mentioned? We could check what is wrong there

p-owens commented 2 years ago

Thanks for the response @kgugala! I'll get back to you in a little while with the waveform, I have to pick up this project again.

p-owens commented 2 years ago

Hiya @kgugala , Thanks for the pointers on rectifying the issue. Please find attached a .zip with the waveform I referenced earlier, also I have included the .resc, .repl and Vtop files that I have used to produce the waveform. In the waveform file, all the signals relating to the FVDMA are located in TOP->top->DMA Let me know what you make of it.

Best, Patrick FVDMA.zip

p-owens commented 2 years ago

@kgugala Is there documentation available for the FVDMA driver? I see that there was some added in 8ff0f07 however, there is very little information provided in those files!

wkkuna commented 2 years ago

Hi @p-owens! Unfortunately, there's no FastVDMA driver-specific documentation. However, it does implement DMAEngine API so the one provided in kernel docs should be sufficient.

There's also some info provided in our blog note on co-simulation for Zynq with Renode. There's a little overview on how the driver works and how the driver demo can be reproduced.

Let us know if you need any more information. Regards, Wiktoria