Closed michalsieron closed 2 years ago
This PR fixes issues with running simulation using TARGET=ddr4_datacenter_test_board
TARGET=ddr4_datacenter_test_board
Added i2c pads to the sim and use I2CMasterSim. Used correct pad names (ddr4, lpddr4) instead of ddram.
I2CMasterSim
ddr4
lpddr4
ddram
Fixes in LiteX for the wishbone arbiter and timeouts. And fix in litedram for DDR4 simulation model.
This PR fixes issues with running simulation using
TARGET=ddr4_datacenter_test_boardAdded i2c pads to the sim and use
I2CMasterSim. Used correct pad names (ddr4,lpddr4) instead ofddram.Fixes in LiteX for the wishbone arbiter and timeouts. And fix in litedram for DDR4 simulation model.