Closed sukhdevkapur closed 3 years ago
@sukhdevkapur OpenStack Cyborg project was recently overhauled including the architecture. It includes for example,
Definition Breakdown General Management Framework:
Accelerators:
@sukhdevkapur , For SRIOV , it will be covered in expectation scopes
We will be discussing and addressing this in the Networking Focus Group. Based upon the outcome of decision, this issue will addressed appropriately.
As moved to RM, closing this issue as per Metering of July 27, 2020.
Should we define the specific requirements for acceleration hardware? What level of detailed specification we want? For example: 1) SmartNIC offload 2) DPDK 3) SRIOV
Do we want to go into the details of FPGA, GPU, etc?
I am assigning both RA1 and RA2 as both need to address this gap.