search

aosp-riscv / platform_bionic

1 stars 5 forks source link

riscv64: fix `fenv` handling #5

Closed liushuyu closed 2 years ago

liushuyu commented 2 years ago

This pull request fixes several issues with fenv handling and should close https://github.com/aosp-riscv/working-group/issues/39.

Issues with fesetenv

There was a typo in fesetenv that prevented the fcsr to be set correctly. The typo has been corrected.

Issues with fesetexcept

fesetexcept should return -1 when the architecture does not support masking FPU exception vectors.

Issues with tests/fenv_test.cpp

Since RISC-V is a RISC architecture, it should be tested like other RISC architecture: fesetexcept should return -1 (indicates the platforms does not support it), and fegetexcept should always return 0.

unicornx commented 2 years ago

From your changes and test result, I think for this issue, we'd better catch up with RVI upstream for fenv related files. Please correct as per my comments and keep in line with the RVI upstream. Then I will merge this PR. Any question please let me know.

liushuyu commented 2 years ago

Addressed comments.