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apfelaudio
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tiliqua
A powerful, hackable FPGA-based audio multitool for Eurorack.
CERN Open Hardware Licence Version 2 - Strongly Reciprocal
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gateware/soc: modify vexriscv configuration, reduce fw size
#36
Closed
vk2seb
closed
2 months ago
vk2seb
commented
2 months ago
fix vexriscv sbt build scripts so its easier to modify in-place
modify vexriscv configuration to remove icache, not necessary for any example bitstreams.
reduce firmware bloat with cargo flags, and reduce sram size from 64K to 32K.
remove
pre_main
for now as it seems to break under LTO. interestingly it doesn't seem to be necessary. maybe because icache is gone.
pre_main
for now as it seems to break under LTO. interestingly it doesn't seem to be necessary. maybe because icache is gone.