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apfelaudio / tiliqua

A powerful, hackable FPGA-based audio multitool for Eurorack.
CERN Open Hardware Licence Version 2 - Strongly Reciprocal
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Reduce resource usage of `Resample` instantiations #46

Open vk2seb opened 1 month ago

vk2seb commented 1 month ago

The Resample DSP component instantiates quite large FIR filters for upsampling beyond 4x, this can quickly eat FPGA area and is heavily used for scope plotting (interpolating lines from points).

We can reduce the area and time footprint quite a bit by adding different internal filter types to Resample, for example one which uses a CIC or Boxcar filter for the primary anti-aliasing filter.

Maybe useful: https://tomverbeure.github.io/2020/09/30/Moving-Average-and-CIC-Filters.html

vk2seb commented 1 month ago

Now that we have a true polyphase resampler that infers BRAM correctly, this is essentially done: https://github.com/apfelaudio/tiliqua/pull/60

I was also able to reduce the tap count multiplier from 8 to 5 and get similar performance (now the new default).

However, having some different internal filter types may still be useful, particularly as Resample is used for Stroke plotting, where aliasing is not such a big deal. It may be worth saving some multipliers there.