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arc-research-lab / SSR

SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)
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Inquiry about Quantization Methods used in Deit Model #1

Open Dinngger opened 7 months ago

Dinngger commented 7 months ago

Hello,

In your paper, it was mentioned that you utilized an INT8 quantized Deit model. I noticed that there is a reformat unit in each HCE for type conversion between int8 and float32, but I did not find this module in the open-source code. Could you please provide more details on the specific quantization methods used? Is it static quantization or dynamic quantization? How were weight quantization and activation quantization implemented respectively? What is the precision of the quantized Deit model after quantization?

Looking forward to your response. Thank you.

Dinngger commented 4 weeks ago

It seems that the weights are stored in header files as const values, and its all {0, 1, -1} values... So weird.