Closed stephenmsachs closed 2 years ago
We need to also add arguments so that compilers will not emit this instruction.
Which instructions are you seeking that are in icelake and not in x86_64_v4`?
This is not only about instructions. Current (and future) Intel compilers can use heuristics and make assumptions based on other CPU feature like cache sizes or latency. They will not be able to make those same assumptions with the ABI version as it is too wide.
We need to also add arguments so that compilers will not emit this instruction.
This cpu Flag is different than ones like avx which are placeholders to enable/disable a set of instructions. The Intel® 64 and IA-32 Architectures Software Developer’s Manual says:
CR4.UMIP User-Mode Instruction Prevention (bit 11 of CR4) — When set, the following instructions cannot be executed if CPL > 0: SGDT, SIDT, SLDT, SMSW, and STR. An attempt at such execution causes a general- protection exception (#GP).
Here CPL is the ring, so if umip
is enabled any call to those instructions from user-mode will result in an exception. We have umip
disabled in those icelake EC2 instances. Furthermore, these calls are emulated by the kernel since 4.15 release, so a application would not see any difference anyway.
there's also cannonlake that can emit umip according to GCC man page.
Yes, I will remove it for cannonlake as well.
Thanks all! And thanks for digging into this @stephenmsachs.
This feature is not exposed in virtualized environments, e.g. icelake based AWS EC2 instances.
With the
umip
flag in place there is no way to identify icelake based instances correctly form within Archspec and the next alternative x86_64_v4 is too wide for proper optimization.