Add for sapphire rapids

[douglasjacobsen]

It would be nice if archspec had support for the sapphire rapids chipset.

[alalazo]

@douglasjacobsen Sure. Can you provide some samples of /proc/cpuinfo for those? One core should be enough for archspec purposes

[alalazo]

@rscohn2 I was wondering, would you have easy access to /proc/cpuinfo for Intel chipsets? We still have #5 open, so if you can provide samples for those we might add these new architectures.

[rscohn2]

What information do you need from cpuinfo? There is a user mode emulator that makes it easy to emulate any model, but it is user mode only so it does not handle /proc/cpuinfo

[alalazo]

What information do you need from cpuinfo?

@rscohn2 We need to check how the features are exposed there. /proc/cpuinfo is how we detect microarchitecture on linux.

[alalazo]

If you want to have a look, we have a collection of samples here: https://github.com/archspec/archspec-json/tree/master/tests/targets and we use them for regression testing in the archspec/archspec repository

[rscohn2]

processor       : 2
vendor_id       : GenuineIntel
cpu family      : 6
model           : 143
model name      : Intel(R) Xeon(R) Platinum 8480+
stepping        : 6
microcode       : 0x2b000181
cpu MHz         : 2000.000
cache size      : 107520 KB
physical id     : 0
siblings        : 112
core id         : 2
cpu cores       : 56
apicid          : 4
initial apicid  : 4
fpu             : yes
fpu_exception   : yes
cpuid level     : 32
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm
 pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_kno
wn_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt
tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cat_l2 cdp_l3 invpcid_single intel_ppin
 cdp_l2 ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 avx2 smep bmi2 e
rms invpcid cqm rdt_a avx512f avx512dq rdseed adx smap avx512ifma clflushopt clwb intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt
 xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local split_lock_detect avx_vnni avx512_bf16 wbnoinvd dtherm ida a
rat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req avx512vbmi umip pku ospke waitpkg avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni av
x512_bitalg tme avx512_vpopcntdq la57 rdpid bus_lock_detect cldemote movdiri movdir64b enqcmd fsrm md_clear serialize tsxldtrk pconfi
g arch_lbr amx_bf16 avx512_fp16 amx_tile amx_int8 flush_l1d arch_capabilities
vmx flags       : vnmi preemption_timer posted_intr invvpid ept_x_only ept_ad ept_1gb flexpriority apicv tsc_offset vtpr mtf vapic ep
t vpid unrestricted_guest vapic_reg vid ple shadow_vmcs pml ept_mode_based_exec tsc_scaling usr_wait_pause
bugs            : spectre_v1 spectre_v2 spec_store_bypass swapgs eibrs_pbrsb
bogomips        : 4000.00
clflush size    : 64
cache_alignment : 64
address sizes   : 52 bits physical, 57 bits virtual
power management: