Closed tushar-semwal closed 4 years ago
There is a bit confusion on the actual SD SPI pins on MKRZERO: the variant.h file says:
variant.h
// SPI1: Connected to SD #define PIN_SPI1_MISO (29u) #define PIN_SPI1_MOSI (26u) #define PIN_SPI1_SCK (27u) #define PIN_SPI1_SS (28u) #define PERIPH_SPI1 sercom4
While the variant.cpp in the comment section mentions:
variant.cpp
/* +------------+------------------+--------+-----------------+--------+-----------------------+---------+---------+--------+--------+----------+----------+ | Pin number | MKR Board pin | PIN | Notes | Peri.A | Peripheral B | Perip.C | Perip.D | Peri.E | Peri.F | Periph.G | Periph.H | | | | | | EIC | ADC | AC | PTC | DAC | SERCOMx | SERCOMx | TCCx | TCCx | COM | AC/GLCK | | | | | |(EXTINT)|(AIN)|(AIN)| | | (x/PAD) | (x/PAD) | (x/WO) | (x/WO) | | | +------------+------------------+--------+-----------------+--------+-----+-----+-----+-----+---------+---------+--------+--------+----------+----------+ | | SD SPI | | | | | | | | | | | | | | | 26 | | PA12 | SD SCK | 12 | | | | | *2/00 | 4/00 | TCC2/0 | TCC0/6 | | AC/CMP0 | | 27 | | PA13 | SD MOSI | 13 | | | | | *2/01 | 4/01 | TCC2/1 | TCC0/7 | | AC/CMP1 | | 28 | | PA14 | SD SS | 14 | | | | | 2/02 | 4/02 | TC3/0 | TCC0/4 | | GCLK_IO0 | | 29 | | PA15 | SD MISO | 15 | | | | | *2/03 | 4/03 | TC3/1 | TCC0/5 | | GCLK_IO1 | | 30 | | PA27 | SD CD | 15 | | | | | | | | | | GCLK_IO0 | +------------+------------------+--------+-----------------+--------+-----+-----+-----+-----+---------+---------+--------+--------+----------+----------+
I can see a swap in pin 26 and 27.
Whats the actual one?
variant.h is correct; the comment on variant.cpp should be fixed since PA12 is MOSI and PA13 is SCK in the particular mux we chose. @Rocketct
There is a bit confusion on the actual SD SPI pins on MKRZERO: the
variant.h
file says:While the
variant.cpp
in the comment section mentions:I can see a swap in pin 26 and 27.
Whats the actual one?