Closed my-vegetable-has-exploded closed 8 months ago
Great catch, thank you too, @my-vegetable-has-exploded! Would you have time to submit a patch?
Great catch, thank you too, @my-vegetable-has-exploded! Would you have time to submit a patch?
I may need some time to familiarize myself with the project. Maybe several days later.
@my-vegetable-has-exploded, much appreciated! The CONTRIBUTING.md contents may help. The very first command should be enough to compile 🤗
@my-vegetable-has-exploded, much appreciated! The CONTRIBUTING.md contents may help. The very first command should be enough to compile 🤗
Sorry, I meet some problems. The situation of my codes is computing dot product of int8 after quantization, I can promise that all numbers fall in [-127,127] in this situation. So it is okay to convert -x*y
to x*-y
and use dpbusd (product of unsigned and signed) to compute the result for me. But if without this gurantee, 0 - (-128) = 128 would overflow.
@my-vegetable-has-exploded not sure about what you mean, but your Rust snippet looked reasonable. I think adjusting the C variant in this repo to work the same way is the way to go 🤷♂️
@my-vegetable-has-exploded not sure about what you mean, but your Rust snippet looked reasonable. I think adjusting the C variant in this repo to work the same way is the way to go 🤷♂️
For example, we have a=[1,-2,3,-4] and b=[11,12,13,14]. We would convert it to a'=[1,2,3,4], b'=[11,-12,13,-14]. But if b=[-128,-128,-128,-128], than b'=[128,128,128,128], 128 would overflow in 8bit presentation.
@my-vegetable-has-exploded I think the best route is to upcast to 16-but and use dpwssd
.
:tada: This issue has been resolved in version 3.9.0 :tada:
The release is available on GitHub release
Your semantic-release bot :package::rocket:
Thanks for your great work!
When i reading codes in simsimd_avx512_i8_cos, https://github.com/ashvardanian/SimSIMD/blob/main/include/simsimd/spatial.h#L1120 I am a little confusing about that both input
a
andb
is signed, but_mm512_dpbusd_epi32
is product ofZeroExtend16
andSignedExtend16
, I think there maybe some problem when vectora
contain negative number like-1
.I think may it need to add more codes like this. https://github.com/my-vegetable-has-exploded/dot-bench/blob/main/src/lib.rs#L54-L57