asmjit / asmdb

Instructions database and utilities for X86/X64 and ARM (THUMB/A32/A64) architectures.
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What does 0 and U mean on the flags? #13

Closed lancejpollard closed 3 years ago

lancejpollard commented 3 years ago

Wondering what 0 and U mean on the metadata for the flags, as in:

OF=U SF=U ZF=U AF=U PF=U CF=U
OF=0 SF=W ZF=W AF=U PF=W CF=0

Also what do the lowercase x vs. uppercase X mean, and lowercase w and W?

x:~r8/m8,~r8
kobalicek commented 3 years ago
lancejpollard commented 3 years ago

@kobalicek What does the id/ud as in X:eax, id/ud mean, as well as the other ib, iw, etc.? Looking at the manual or here I don't see anything other than potentially it's an opcode. But it doesn't match up with the docs, so not sure what it means.

Also what is r64/m64, I see r/m64 in the intel docs, but not r64/m64. Sorry I'm new to this :)

kobalicek commented 3 years ago

AsmDB provides some extensions that are either not part of the opcode in the manual or that are written in the docs somewhere. For example imagine add r32, immediate - you have multiple options: add r32, ib - immediate encoded as byte, or add r32, id/ud - immediate encoded as dword - doesn't matter whether it's signed or unsigned.

AsmJit then is able to validate the instruction, so add r32, -1 would be the same as add r32, 0xFFFFFFFF - but add r64, -1 is not the same as add r64, 0xFFFFFFFF.

lancejpollard commented 3 years ago

Thank you very much, this helps a lot.

lancejpollard commented 3 years ago

@kobalicek These I'm guessing are in the intel docs described somewhere, not sure what they mean but I'm sure I'll find them:

//               - {k} mask selector.
//               - {z} zeroing.
//               - {1tox} broadcast.
//               - {er} embedded-rounding.
//               - {sae} suppress-all-exceptions.

How about this too?

Op[A:B] - Optional bit-range that describes which bits are read and written.

So for example we have:

"addsd"            , "x:xmm[63:0], xmm[63:0]/m64"

What does it mean exactly?

These values like VEX.128.66.0F38.W0 5E /r I've never encountered yet, or even VEX.128.66.0F.WIG F6 /r? Looks like they are in the docs so I'll just leave it at that for now :)

Think that's all the questions I have for today.

This library is fantastic.

kobalicek commented 3 years ago

The first are AVX-512 optionals, they are described in Intel X86 manuals, Op[A:B] is asmdb extension, specifying which bits of the operand are accessed:

"addsd"            , "x:xmm[63:0], xmm[63:0]/m64"

First operand is RW from bits [63:0] (other bits untouched), second operand is read - xmm register from bits 63:0, or 64-bit memory location.