atrosinenko memtest86-plus-riscv issues - Githubissues

atrosinenko / memtest86-plus-riscv

Port of original MemTest86+ v5.1 to other architectures (RISC-V for now)

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For manual startup, place memtest_shared.bin anywhere into your board RAM. Set registers as follows:

#2 AchyuthAGNA5675 opened 2 years ago
2
Memtest+ as resumed care to upstream your changes

#1 bastien-roucaries opened 3 years ago
2