Add support for GMAC/PHY

[se7kn8]

Hello, I don't know if you're still working on the ethernet support for the atsam4e, but I've seen your branch and tested it myself to get ethernet support working. (Or if anyone else want to implement it and have some problems with it)

There were two things, that I needed to change to get it working:

1. In ethernet/tx.rs: Change

   pub fn set_last(self) -> Self {
       Writer(self.0, self.1 & !(1 << Word1BitNumbers::LastBuffer as u32))
   }

   to

   pub fn set_last(self) -> Self {
       Writer(self.0, self.1 | (1 << Word1BitNumbers::LastBuffer as u32))
   }

   the current code seems to incorrecly clear the last bit of the descriptor, while it should set the bit.

2. In ethernet/phy/mod.rs Change the register number for the Pcr1 register from 0x1E to 0x05. Also a name change would be requiered since, it isn't the phy control register #1 anymore (this seems to be a vendor-specific register) but now it's the Auto Negotiation Link Partner Ability Register, which seems to be a standart register.

With these two changes it got it to without any problems. Thanks for your work on this!

[john-terrell]

That's awesome!  Thanks so much for the report.   If you have changes made in a fork, feel free to submit a PR and we'll get it merged.

Thanks.

-John

------- Original Message ------- On Saturday, January 7th, 2023 at 11:15 AM, Sebastian Knackstedt @.***> wrote:

Hello, I don't know if you're still working on the ethernet support for the atsam4e, but I've seen your branch and tested it myself to get ethernet support working. (Or if anyone else want to implement it and have some problems with it)

There were two things, that I needed to change to get it working:

1. In ethernet/tx.rs: Change

   pub fn set_last(self) -> Self { Writer(self.0, self.1 & !(1 << Word1BitNumbers::LastBuffer as u32)) }

to

pub fn set_last(self) -> Self {
    Writer(self.0, self.1 | (1 << Word1BitNumbers::LastBuffer as u32))
}

the current code seems to incorrecly clear the last bit of the descriptor, while it should set the bit.

2. In ethernet/phy/mod.rs Change the register number for the Pcr1 register from 0x1E to 0x05. Also a name change would be requiered since, it isn't the phy control register #1 anymore (this seems to be a vendor-specific register) but now it's the Auto Negotiation Link Partner Ability Register, which seems to be a standart register.

With these two changes it got it to without any problems. Thanks for your work on this!

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