avr-llvm / llvm

[MERGED UPSTREAM] AVR backend for the LLVM compiler library
220 stars 21 forks source link

Implement wide bit rotate pseudo instructions #113

Open dylanmckay opened 9 years ago

dylanmckay commented 9 years ago

Currently no logic exists in AVRExpandPseudoInsts.cpp to lower the rolw Rd+1:Rd and rorw Rd+1:Rd instructions.

They are defined as pseudo instructions, but they are not lowered. Because of this, using them will cause an error in LLVM.