Open cpldcpu opened 8 years ago
AVR-LLVM generates a 32 bit STS instruction on the ATtiny10, while only the 16 bit one is supported. Also, it appears that the memory map of the ATtiny10 is not implemented correctly.
I suppose this issue is similar to: https://github.com/avr-llvm/llvm/issues/138
Example:
unsigned char global; void test(void) { global=7; }
Generated code:
0: 87 e0 ldi r24, 0x07 ; 7 2: 80 93 00 00 sts 0x0000, r24 6: 08 95 ret
Probably a low priority issue, but this will break most programs on the avrtiny-core.
AVR-LLVM generates a 32 bit STS instruction on the ATtiny10, while only the 16 bit one is supported. Also, it appears that the memory map of the ATtiny10 is not implemented correctly.
I suppose this issue is similar to: https://github.com/avr-llvm/llvm/issues/138
Example:
Generated code:
Probably a low priority issue, but this will break most programs on the avrtiny-core.