InstPrinter does not print aliases with duplicate operands

[dylanmckay]

• tst Rd maps to and Rd, Rd
• clr Rd maps to eor Rd, Rd
• ser Rd maps to ldi Rd, 0xff

The first two instructions, when printed, are not written as tst Rd or clr Rd - they are printed as and Rd, Rd and eor Rd, Rd. The last instruction correctly maps to ser Rd when printed.

The only difference between the two is that ser Rd only has Rd once in the pattern, whereas tst and clr have Rd repeated in the pattern.

It appears that instruction aliases with repeated operands in the patterns do not work correctly with regards to the instruction printer. A brief debugging shows that inside printAliasInstr in AVRGenAsmWriter.inc (generated by TableGen) checks if the MCInst has 2 operands (presumably a brief sanity check), before it checks whether the instruction corresponds to tst or clr - however, the instruction always contains 3 operands - Rd repeated three times, causing the conditional to never be true, and the alias to not be printed.

In utils/TableGen, the CodeGenInstAlias class holds information about an alias - the string pattern, the instruction that is being aliased, and the arguments to the instruction. TableGen isn't adding duplicate operands from the CodeGenInstruction Result into the ResultOperands field in the CodeGenInstAlias if it is a duplicate.

[dylanmckay]

Adding testing flag because we have to write our machine code tests around this bug, and will have to update them all once it is fixed.

[dylanmckay]

This is a bug in LLVM.

In AVRGenAsmWriter.inc, the instruction alias printer does not handle duplicate operands that are constrained to be identical. The symptom of this is that whenever there is an alias of an instruction with a repeated operand, the alias will never be resolved.

[dylanmckay]

Here is my private branch with half a fix.

[dylanmckay]

I have opened up LLVM bug 23925

[dylanmckay]

This seems to be fixed since r318895