2023-10 调试记录

[axiangyushanhaijing]

10.18 review过程中发现一处遗漏修改

diff --git a/hotspot/src/cpu/riscv64/vm/sharedRuntime_riscv64.cpp b/hotspot/src/cpu/riscv64/vm/sharedRuntime_riscv64.cpp
index f59b263e950..0588a52271b 100644
--- a/hotspot/src/cpu/riscv64/vm/sharedRuntime_riscv64.cpp
+++ b/hotspot/src/cpu/riscv64/vm/sharedRuntime_riscv64.cpp
@@ -1892,7 +1892,7 @@ nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
     //__ resolve_jobject(x10, xthread, t1);
   Label done, not_weak;
     __ beqz(x10, done);           // Use NULL as-is.
-   // STATIC_ASSERT(JNIHandles::weak_tag_mask == 1u);
+    STATIC_ASSERT(JNIHandles::weak_tag_mask == 1u);
     //__ tbz(x10, 0, not_weak);    // Test for jweak tag.
     __ andi(t0, x10, JNIHandles::weak_tag_mask);
     __ beqz(t0, not_weak);

此处关于load/store的使用后续可做统一修改。

注：此处修改有误，应该保持原状

[axiangyushanhaijing]

此处有待讨论

[axiangyushanhaijing]

10.25---https://github.com/zhangxiang-plct/jdk8u/commit/0a1a172e8ba7def69ca98012e9d22a3fdb2df9d9 CompilerThreadStackSize--在jdk8中设置为0

[axiangyushanhaijing]

关于公共代码添加riscv支持调研： 1、

  // Smash zero into card
  if( !UseConcMarkSweepGC ) {
#if defined(AARCH64) || defined(RISCV64)
    __ store(__ ctrl(), card_adr, zero, bt, adr_type, MemNode::unordered);
#else
    __ store(__ ctrl(), card_adr, zero, bt, adr_type, MemNode::release);
#endif
  } else {
    // Specialized path for CM store barrier
    __ storeCM(__ ctrl(), card_adr, zero, oop_store, adr_idx, bt, adr_type);
  }

2、

  // Copy registers for callee-saved registers
  if (reg_map != NULL) {
    for(int i = 0; i < RegisterMap::reg_count; i++) {
#if defined(AMD64) || defined(AARCH64) || defined(RISCV64)
      // The register map has one entry for every int (32-bit value), so
      // 64-bit physical registers have two entries in the map, one for
      // each half.  Ignore the high halves of 64-bit registers, just like
      // frame::oopmapreg_to_location does.
      //
      // [phh] FIXME: this is a temporary hack!  This code *should* work
      // correctly w/o this hack, possibly by changing RegisterMap::pd_location
      // in frame_amd64.cpp and the values of the phantom high half registers
      // in amd64.ad.
      //      if (VMReg::Name(i) < SharedInfo::stack0 && is_even(i)) {
        intptr_t* src = (intptr_t*) reg_map->location(VMRegImpl::as_VMReg(i));
        _callee_registers[i] = src != NULL ? *src : NULL_WORD;
        //      } else {
        //      jint* src = (jint*) reg_map->location(VMReg::Name(i));
        //      _callee_registers[i] = src != NULL ? *src : NULL_WORD;
        //      }
#else

3、

#if defined(AARCH64) || defined(RISCV64)
  // Return true if allocation doesn't escape thread, its escape state
  // needs be noEscape or ArgEscape. InitializeNode._does_not_escape
  // is true when its allocation's escape state is noEscape or
  // ArgEscape. In case allocation's InitializeNode is NULL, check
  // AlllocateNode._is_non_escaping flag.
  // AlllocateNode._is_non_escaping is true when its escape state is
  // noEscape.
  bool does_not_escape_thread() {
    InitializeNode* init = NULL;
    return _is_non_escaping || (((init = initialization()) != NULL) && init->does_not_escape());
  }
#endif

4、https://github.com/zhangxiang-plct/jdk8u/commit/b9567decf904b5f0e60bf8ce9b9404c37b3a12cc https://docs.rs/syscall-numbers/latest/syscall_numbers/riscv64/constant.SYS_clock_getres.html 部分还需要再研究

diff --git a/hotspot/src/os/linux/vm/os_linux.cpp b/hotspot/src/os/linux/vm/os_linux.cpp
index 17d07129cff..4a76e4bb854 100644
--- a/hotspot/src/os/linux/vm/os_linux.cpp
+++ b/hotspot/src/os/linux/vm/os_linux.cpp
@@ -1419,7 +1419,7 @@ void os::Linux::clock_init() {
 #ifndef SYS_clock_getres

 #if defined(IA32) || defined(AMD64) || defined(AARCH64)
-#define SYS_clock_getres IA32_ONLY(266)  AMD64_ONLY(229) AARCH64_ONLY(114) RISCV64_ONLY(114)
+#define SYS_clock_getres IA32_ONLY(266)  AMD64_ONLY(229) AARCH64_ONLY(114) 
 #define sys_clock_getres(x,y)  ::syscall(SYS_clock_getres, x, y)
 #else
 #warning "SYS_clock_getres not defined for this platform, disabling fast_thread_cpu_time"
diff --git a/hotspot/src/share/vm/opto/macro.cpp b/hotspot/src/share/vm/opto/macro.cpp
index 737cbcb9ff6..4b7e1d7437b 100644
--- a/hotspot/src/share/vm/opto/macro.cpp
+++ b/hotspot/src/share/vm/opto/macro.cpp
@@ -1385,7 +1385,7 @@ void PhaseMacroExpand::expand_allocate_common(
     // MemBarStoreStore so that stores that initialize this object
     // can't be reordered with a subsequent store that makes this
     // object accessible by other threads.
-#ifndef AARCH64
+#if !defined(AARCH64)||!defined(RISCV64)
     if (init == NULL || (!init->is_complete_with_arraycopy() && !init->does_not_escape())) {
 #else
     if (!alloc->does_not_escape_thread() &&
diff --git a/hotspot/src/share/vm/opto/memnode.cpp b/hotspot/src/share/vm/opto/memnode.cpp
index 996c29b9a0e..42603bf39af 100644
--- a/hotspot/src/share/vm/opto/memnode.cpp
+++ b/hotspot/src/share/vm/opto/memnode.cpp
@@ -3179,8 +3179,11 @@ Node *MemBarNode::Ideal(PhaseGVN *phase, bool can_reshape) {
       // Final field stores.
       Node* alloc = AllocateNode::Ideal_allocation(in(MemBarNode::Precedent), phase);
       if ((alloc != NULL) && alloc->is_Allocate() &&
-          AARCH64_ONLY ( alloc->as_Allocate()->does_not_escape_thread() )
-          NOT_AARCH64  ( alloc->as_Allocate()->_is_non_escaping )
+  #if defined(AARCH64) || defined(RISCV64)
+             alloc->as_Allocate()->does_not_escape_thread() 
+  #else
+             alloc->as_Allocate()->_is_non_escaping 
+  #endif
          ) {
         // The allocated object does not escape.
         eliminate = true;
diff --git a/hotspot/src/share/vm/prims/jvmtiExport.cpp b/hotspot/src/share/vm/prims/jvmtiExport.cpp
index 967ed200d9f..24e4d62bd3d 100644
--- a/hotspot/src/share/vm/prims/jvmtiExport.cpp
+++ b/hotspot/src/share/vm/prims/jvmtiExport.cpp
@@ -1239,7 +1239,7 @@ void JvmtiExport::post_method_exit(JavaThread *thread, Method* method, frame cur
     }
   }

-#ifdef AARCH64
+#if defined(AARCH64)|| defined(RISCV64)
   // FIXME: this is just a kludge to get JVMTI going.  Compiled
   // MethodHandle code doesn't call the JVMTI notify routines, so the
   // stack depth we see here is wrong.

[axiangyushanhaijing]

已提交pr ---https://github.com/zhangxiang-plct/jdk8u/commit/b689693a7152ebf836442ede86b37e1aab4071c4 jdk8u/vtableStubs_riscv64.patch

diff --git a/hotspot/src/cpu/riscv64/vm/vtableStubs_riscv64.cpp b/hotspot/src/cpu/riscv64/vm/vtableStubs_riscv64.cpp
index 9764750f4bd..138e564a6f5 100644
--- a/hotspot/src/cpu/riscv64/vm/vtableStubs_riscv64.cpp
+++ b/hotspot/src/cpu/riscv64/vm/vtableStubs_riscv64.cpp
@@ -60,9 +60,7 @@ VtableStub* VtableStubs::create_vtable_stub(int vtable_index) {
   // Count unused bytes in instruction sequences of variable size.
   // We add them to the computed buffer size in order to avoid
   // overflow in subsequently generated stubs.
-  address   start_pc = NULL;
-  int       slop_bytes = 0;
-  int       slop_delta = 0;
+

   ResourceMark    rm;
   CodeBuffer      cb(s->entry_point(), stub_code_length);
@@ -87,7 +85,6 @@ VtableStub* VtableStubs::create_vtable_stub(int vtable_index) {
 #ifndef PRODUCT
   if (DebugVtables) {
     Label L;
-    start_pc = __ pc();

     // check offset vs vtable length
     __ lwu(t0, Address(t2, InstanceKlass::vtable_length_offset()* wordSize));
@@ -108,7 +105,7 @@ VtableStub* VtableStubs::create_vtable_stub(int vtable_index) {
   }
 #endif // PRODUCT

-  start_pc = __ pc();
+  
   __ lookup_virtual_method(t2, vtable_index, xmethod);
   // lookup_virtual_method generates
   // 4 instructions (maximum value encountered in normal case):li(lui + addiw) + add + ld
@@ -161,9 +158,6 @@ VtableStub* VtableStubs::create_itable_stub(int itable_index) {
   // Count unused bytes in instruction sequences of variable size.
   // We add them to the computed buffer size in order to avoid
   // overflow in subsequently generated stubs.
-  address   start_pc = NULL;
-  int       slop_bytes = 0;
-  int       slop_delta = 0;

   ResourceMark    rm;
   CodeBuffer      cb(s->entry_point(), stub_code_length);
@@ -197,7 +191,7 @@ VtableStub* VtableStubs::create_itable_stub(int itable_index) {
   __ ld(resolved_klass_reg, Address(icholder_reg, CompiledICHolder::holder_klass_offset()));
   __ ld(holder_klass_reg,   Address(icholder_reg, CompiledICHolder::holder_metadata_offset()));

-  start_pc = __ pc();
+

   // get receiver klass (also an implicit null-check)
   address npe_addr = __ pc();
@@ -212,8 +206,8 @@ VtableStub* VtableStubs::create_itable_stub(int itable_index) {
                              L_no_such_interface,
                              /*return_method=*/false);

-  const ptrdiff_t typecheckSize = __ pc() - start_pc;
-  start_pc = __ pc();
+ // const ptrdiff_t typecheckSize = __ pc() - start_pc;
+ // start_pc = __ pc();

   // Get selected method from declaring class and itable index
   __ load_klass(recv_klass_reg, j_rarg0);   // restore recv_klass_reg
@@ -232,7 +226,7 @@ VtableStub* VtableStubs::create_itable_stub(int itable_index) {
   //slop_bytes += slop_delta;
   ///vmassert(slop_delta >= 0, "itable #%d: Code size estimate (%d) for lookup_interface_method too small, required: %d", itable_index, (int)estimate, (int)codesize);

-#ifdef ASSERT
+#ifndef PRODUCT
   if (DebugVtables) {
     Label L2;
     __ beqz(xmethod, L2);

[axiangyushanhaijing]

10.25--https://github.com/zhangxiang-plct/jdk8u/commit/877b1d7aa809cce64d303d24cda1167284c680bd https://github.com/zhangxiang-plct/jdk8u/commit/7c252ff7e5d86da7f278e3fcad5d2738a217ad7e 主要添加c2相关的函数，以及删除了一些多余的函数

diff --git a/hotspot/src/cpu/riscv64/vm/stubGenerator_riscv64.cpp b/hotspot/src/cpu/riscv64/vm/stubGenerator_riscv64.cpp
index ef4f5c57d7c..1731248e527 100644
--- a/hotspot/src/cpu/riscv64/vm/stubGenerator_riscv64.cpp
+++ b/hotspot/src/cpu/riscv64/vm/stubGenerator_riscv64.cpp
@@ -648,8 +648,8 @@ void gen_write_ref_array_post_barrier(Register start, Register end, Register scr
     __ mv(c_rarg3, (intptr_t) Universe::verify_oop_bits());

     // Compare c_rarg2 and c_rarg3
-    __ xorr(c_rarg2, c_rarg2, c_rarg3);
-    __ bnez(c_rarg2, error);
+    //__ xorr(c_rarg2, c_rarg2, c_rarg3);
+    __ bne(c_rarg2, c_rarg3, error);

     // make sure klass is 'reasonable', which is not zero.
     __ load_klass(x10, x10);  // get klass
@@ -2817,7 +2817,7 @@ void gen_write_ref_array_post_barrier(Register start, Register end, Register scr
       StubRoutines::riscv64::_large_array_equals = generate_large_array_equals();
     }

-   // generate_compare_long_strings();
+    generate_compare_long_strings();

     // Safefetch stubs.
     generate_safefetch("SafeFetch32", sizeof(int),     &StubRoutines::_safefetch32_entry,
@@ -2827,7 +2827,7 @@ void gen_write_ref_array_post_barrier(Register start, Register end, Register scr
                                                        &StubRoutines::_safefetchN_fault_pc,
                                                        &StubRoutines::_safefetchN_continuation_pc);

-   // StubRoutines::riscv64::set_completed();
+    //StubRoutines::riscv64::set_completed();
   }

  public:

[axiangyushanhaijing]

参考jdk11，此处不需要修改

[axiangyushanhaijing]

#ifndef PRODUCT
// Increments unsigned long value for statistics (not atomic on MP).
inline void inc_stat_counter(volatile julong* dest, julong add_value) {
#if defined(SPARC) || defined(X86) || defined(AARCH64) 
  // Sparc, X86 and AArch64 have atomic jlong (8 bytes) instructions
  julong value = Atomic::load((volatile jlong*)dest);
  value += add_value;
  Atomic::store((jlong)value, (volatile jlong*)dest);
#else
  // possible word-tearing during load/store
  *dest += add_value;
#endif

此处riscv是否支持有待研究。

[axiangyushanhaijing]

https://mail.openjdk.org/pipermail/aarch64-port-dev/2013-July/000067.html

// AARCH64 cannot handle shifts which are not either 0, or log2 of the type size
#ifdef RISCV64
  if (*log2_scale != 0 &&
        (1 << *log2_scale) != type2aelembytes(x->basic_type(), true))
    return false;
#endif

暂待研究

[axiangyushanhaijing]

可以参考 jdk11-7a15ac05f

[axiangyushanhaijing]

10.31 https://github.com/zhangxiang-plct/jdk8u/commit/bfd83ab19cc985549574b3b1e2d104bb855fe9db

https://github.com/zhangxiang-plct/jdk8u/commit/2dd06af20edb2f6a149e7907597f073104906c3c

https://github.com/zhangxiang-plct/jdk8u/commit/3b8adb1a4c63d314f50f3db9daaa1122003039e5

修改了一处冗余代码

https://github.com/zhangxiang-plct/jdk8u/commit/28affcd7e66ebb00cbebaa61a35ff5e46e7fbfc3

增加了析构函数

https://github.com/zhangxiang-plct/jdk8u/commit/c0ae748b6f11b3de924dcc6743678b86646f9241 增加了 SYS_clock_getres for riscv64

[axiangyushanhaijing]

基于temp-for-newer-jtreg分支新建一个c1：temp-c1分支，重新开始编译构建