Once a SLG46621 has VCCO_2 enabled, dev board can't use pin 14 for logic anymore

azonenberg / openfpga

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Once a SLG46621 has VCCO_2 enabled, dev board can't use pin 14 for logic anymore #55

Closed azonenberg closed 8 years ago

azonenberg commented 8 years ago

Pin 14 seems to get stuck in siggen mode even after soft resets.

WORKAROUND: When swapping the ZIF socket from a SLG46621 to any other device, cycle power on the dev board.

azonenberg commented 8 years ago

Temporary workaround for initial testing: Drive pin 14 with TP_VDD rather than a siggen. Although this does not allow use of a second (lower) voltage rail it avoids screwing with the siggen config in a (currently) hard to reverse fashion.