[x] A related or similar issue is not already marked as open
[x] Another issue describing a similar feature has not already been marked as wontfix or closed
[x] This feature is not already present in the software
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Feature Description
A driver should be implemented which support the GICv3 interrupt controller, for it's added benefits to
supported hardware, and lifting restrictions on core counts being very low. It is also important to note
that a GICv3 implementation may not be backwards compatible with the GICv2, requiring the creation
of this driver for hardware support.
Feature Benefits
List the reasons why this feature would be beneficial
GICv3 is more common in newer hardware platforms, ie, i.MX8, RK33xx.
GICv3 lifts restrictions from 8 CPUs to 512 CPUs
GICv3 acts as system coprocessor, not as MMIO peripheral
Use case examples
List examples where this feature could be useful for end users.
Allows for initial support for a real hardware port to RK33xx series SoC
Allows for initial support for a real hardware port to i.MX8 series SoC
Version under QEMU simulation can be changed to use GICv3 for testing
Additional information
Any additional information should be placed here.
Issue Checklist
wontfixor closed===================================================== Feature Description A driver should be implemented which support the GICv3 interrupt controller, for it's added benefits to supported hardware, and lifting restrictions on core counts being very low. It is also important to note that a GICv3 implementation may not be backwards compatible with the GICv2, requiring the creation of this driver for hardware support.
Feature Benefits List the reasons why this feature would be beneficial
Use case examples List examples where this feature could be useful for end users.
Additional information Any additional information should be placed here.