Closed baldengineer closed 10 months ago
A2C and A2D are NAND gates. Their inputs are tied to GND which forces their outputs HIGH. The Apple II+ schematic uses these unused gates (of A2) to pull-up the SOFT5 signal.
Setting ERC to exclude this violation since it was done on purpose.
A2C and A2D are NAND gates. Their inputs are tied to GND which forces their outputs HIGH. The Apple II+ schematic uses these unused gates (of A2) to pull-up the SOFT5 signal.