SPL creation info

[gtxaspec]

Would you please detail how you created (or modified) the SPL that defines ddr speed, etc?

I'd like to add support for the Ingenic T series CPU's if possible for reading from NOR/NAND

example cloner config:

[ddr]
bank8=1
creator_version=1
cs0=1
cs1=0
current_ddr=M14D1G1664A_DDR2.cfg
current_type="4,DDR2"
dw32=0

[debug]
boot_stage_send_length=1
cpu_info_length=8
log=1
read_back_chk=0
stage2_init_timeout=200
str_to_hex=-1
transfer_data_chk=1
transfer_size=1048576
uart_burn_baudrate=921600
uart_transfer_size=32768

[gpio]
config="-1,-1,0,"

[info]
baud_rate=115200
complete=0
count=0
cpu_and_ddr_freq_limit_index=0
cpufreq=576000000
ddrfreq=400000000
extal=24000000
force_reset=1
power_off=0
sync_time=0
uart_gpio=1

cloner spl/uboot for reference: t31_spl_uboot.zip

[ballaswag]

It’s harder to do with their toolchain since there were a lot of configurations. The shared spl in their cloner tool also doesn’t contain the ddr stuff, at least not for the x2000.

The way I got it was from using wireshark and the usbmon tool to sniff the usb traffic. Set it up to capture for the correct USB device, use their cloner tool to do some op on your board. The op should trigger the stage1 stage2 bootstrap. Along those you should see a write that contains the DDR configuration.

Hope that works for you.