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banhbaoxamlan / X230-Hackintosh

READMEs, OpenCore configurations, patches, and notes for the Thinkpad X230 Hackintosh
https://banhbaoxamlan.github.io/X230-Hackintosh/
MIT License
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sleep issue and lcd maximum backlight issue #3

Closed 13631181823 closed 4 years ago

13631181823 commented 4 years ago

cant wake up after sleep，black screen. x230i lcd screen maximum backlight too dark. hope u can help me fix it

banhbaoxamlan commented 4 years ago

cant wake up after sleep，black screen. x230i lcd screen maximum backlight too dark. hope u can help me fix it

Try it, I have add hot patch to fix sleep(but still test, not public yet ^^): Link

jamesfawcett commented 4 years ago

I've requested access too, I have same issue on x201 I can't fix

banhbaoxamlan commented 4 years ago

I've requested access too, I have same issue on x201 I can't fix

U can try use hotpatch by daliansky: https://github.com/daliansky/P-little/tree/master/部件补丁包

jamesfawcett commented 4 years ago

Great tip thank you, I will check these out

13631181823 commented 4 years ago

@banhbaoxamlan Reporting today's situation, 1. wake up after sleep is normal, but after closing the screen cover for multiple sleeps, the trackpoint and the middle button do not work. 2.There is another weird thing. Last time I said that the screen brightness is too dark, but the brightness is normal after sleep.

banhbaoxamlan commented 4 years ago

2.There is another weird thing. Last time I said that the screen brightness is too dark, but the brightness is normal after sleep.

I think you need injecting EDID

13631181823 commented 4 years ago

2.There is another weird thing. Last time I said that the screen brightness is too dark, but the brightness is normal after sleep.

I think you need injecting EDID

**

1. ejected EDID in the config ,still the same issue,i think maybe the PNLF.aml problem. here is my PNLF.aml(working great in x230i lcd screen).

2.by the way,do you know chinese or cantonese.

DefinitionBlock ("", "SSDT", 2, "hack", "PNLF-23", 0x00000000) { External (SB.PCI0.IGPU, DeviceObj)

Scope (_SB.PCI0.IGPU)
{
    OperationRegion (RMP3, PCI_Config, Zero, 0x14)
}

Scope (_SB)
{
    Device (PNLF)
    {
        Name (_ADR, Zero)  // _ADR: Address
        Name (_HID, EisaId ("APP0002"))  // _HID: Hardware ID
        Name (_CID, "backlight")  // _CID: Compatible ID
        Name (_UID, 0x0E)  // _UID: Unique ID
        Name (_STA, 0x0B)  // _STA: Status
        Field (\_SB.PCI0.IGPU.RMP3, AnyAcc, NoLock, Preserve)
        {
            Offset (0x10), 
            BAR1,   32
        }

        OperationRegion (RMB1, SystemMemory, (BAR1 & 0xFFFFFFFFFFFFFFF0), 0x000E1184)
        Field (RMB1, AnyAcc, Lock, Preserve)
        {
            Offset (0x48250), 
            Offset (0x48254), 
            LEVL,   32, 
            Offset (0xC8250), 
            LEVW,   32, 
            LEVX,   32, 
            LEVD,   32
        }

        Method (_INI, 0, NotSerialized)  // _INI: Initialize
        {
            Local2 = 0x0710
            Local1 = (^LEVX >> 0x10)
            If (!Local1)
            {
                Local1 = Local2
            }

            If ((Local2 != Local1))
            {
                Local0 = ((^LEVL * Local2) / Local1)
                Local3 = (Local2 << 0x10)
                If ((Local2 > Local1))
                {
                    ^LEVX = Local3
                    ^LEVL = Local0
                }
                Else
                {
                    ^LEVL = Local0
                    ^LEVX = Local3
                }
            }
        }
    }
}

}

banhbaoxamlan commented 4 years ago

1. ejected EDID in the config ,still the same issue,i think maybe the PNLF.aml problem. here is my PNLF.aml(working great in x230i lcd screen).

2.by the way,do you know chinese or cantonese.

WOW, tks for share ^^

Sorry, I don't know, maybe I can use gg trans :grin:

banhbaoxamlan commented 4 years ago

hmm, trackpoint not working after wake from sleep, but if I wake after sleep about 1-2hour, trackpoint work normal :sweat_smile: :sweat_smile: :sweat_smile:

jamesfawcett commented 4 years ago

hmm, trackpoint not working after wake from sleep, but if I wake after sleep about 1-2hour, trackpoint work normal :sweat_smile: :sweat_smile: :sweat_smile:

I had this same issue (but on another model thinkpad) the solution was to downgrade VooDooPS2Controller to an earlier version

medkintos commented 4 years ago

hmm, trackpoint not working after wake from sleep, but if I wake after sleep about 1-2hour, trackpoint work normal 😅 😅 😅

I had this same issue (but on another model thinkpad) the solution was to downgrade VooDooPS2Controller to an earlier version

what version did you use for fixing the problem?

jamesfawcett commented 4 years ago

hmm, trackpoint not working after wake from sleep, but if I wake after sleep about 1-2hour, trackpoint work normal 😅 😅 😅

I had this same issue (but on another model thinkpad) the solution was to downgrade VooDooPS2Controller to an earlier version

what version did you use for fixing the problem?

Hello for me, I believe it was around version 1.8. It's this exact one here: https://github.com/jamesfawcett/Thinkpad-X201-Hackintosh-Catalina/tree/master/EFI/EFI/CLOVER/kexts/Other

It's the only kext that is not up to date, for that very reason :) My hardware is slightly different though. I am currently watching a few X230 i5-3320 on ebay to build something like @banhbaoxamlan with hardware acceleration working.

banhbaoxamlan commented 4 years ago

It's the only kext that is not up to date, for that very reason :) My hardware is slightly different though. I am currently watching a few X230 i5-3320 on ebay to build something like @banhbaoxamlan with hardware acceleration working.

I see this on reddit https://www.reddit.com/r/thinkpadsforsale/comments/igxcgk/eusihthinkpad_x230ips_wpaypalsepa/

jamesfawcett commented 4 years ago

Oh yes good find! I actually like the look of this one though, needs more RAM but they're brand new :) https://www.ebay.co.uk/itm/283966615781

13631181823 commented 4 years ago

by the way this is my i3-3120M SSDT-PM.aml.

DefinitionBlock ("", "SSDT", 1, "APPLE ", "CpuPm", 0x00021500) { External (PR.CPU0, DeviceObj) External (PR.CPU1, DeviceObj) External (PR.CPU2, DeviceObj) External (PR.CPU3, DeviceObj)

Scope (\_PR.CPU0)
{
    Method (_INI, 0, NotSerialized)  // _INI: Initialize
    {
        Debug = "ssdtPRGen version.....: 21.5 / Mac OS X 10.15.6 (19G2021)"
        Debug = "custom mode...........: 0"
        Debug = "host processor........: Intel(R) Core(TM) i3-3120M CPU @ 2.50GHz"
        Debug = "target processor......: i3-3120M"
        Debug = "number of processors..: 1"
        Debug = "baseFrequency.........: 1200"
        Debug = "frequency.............: 2500"
        Debug = "busFrequency..........: 100"
        Debug = "logicalCPUs...........: 4"
        Debug = "maximum TDP...........: 35"
        Debug = "packageLength.........: 14"
        Debug = "turboStates...........: 0"
        Debug = "maxTurboFrequency.....: 2500"
        Debug = "CPU Workarounds.......: 3"
        Debug = "machdep.xcpm.mode.....: 0"
    }

    Name (APLF, 0x05)
    Name (APSN, One)
    Name (APSS, Package (0x14)
    {
        Package (0x06)
        {
            0x09C5, 
            0x88B8, 
            0x0A, 
            0x0A, 
            0x1A00, 
            0x1A00
        }, 

        Package (0x06)
        {
            0x09C4, 
            0x88B8, 
            0x0A, 
            0x0A, 
            0x1900, 
            0x1900
        }, 

        Package (0x06)
        {
            0x0960, 
            0x81C3, 
            0x0A, 
            0x0A, 
            0x1800, 
            0x1800
        }, 

        Package (0x06)
        {
            0x08FC, 
            0x7AF0, 
            0x0A, 
            0x0A, 
            0x1700, 
            0x1700
        }, 

        Package (0x06)
        {
            0x0898, 
            0x743E, 
            0x0A, 
            0x0A, 
            0x1600, 
            0x1600
        }, 

        Package (0x06)
        {
            0x0834, 
            0x6DAE, 
            0x0A, 
            0x0A, 
            0x1500, 
            0x1500
        }, 

        Package (0x06)
        {
            0x07D0, 
            0x673F, 
            0x0A, 
            0x0A, 
            0x1400, 
            0x1400
        }, 

        Package (0x06)
        {
            0x076C, 
            0x60F1, 
            0x0A, 
            0x0A, 
            0x1300, 
            0x1300
        }, 

        Package (0x06)
        {
            0x0708, 
            0x5AC3, 
            0x0A, 
            0x0A, 
            0x1200, 
            0x1200
        }, 

        Package (0x06)
        {
            0x06A4, 
            0x54B5, 
            0x0A, 
            0x0A, 
            0x1100, 
            0x1100
        }, 

        Package (0x06)
        {
            0x0640, 
            0x4EC7, 
            0x0A, 
            0x0A, 
            0x1000, 
            0x1000
        }, 

        Package (0x06)
        {
            0x05DC, 
            0x48F9, 
            0x0A, 
            0x0A, 
            0x0F00, 
            0x0F00
        }, 

        Package (0x06)
        {
            0x0578, 
            0x434A, 
            0x0A, 
            0x0A, 
            0x0E00, 
            0x0E00
        }, 

        Package (0x06)
        {
            0x0514, 
            0x3DBA, 
            0x0A, 
            0x0A, 
            0x0D00, 
            0x0D00
        }, 

        Package (0x06)
        {
            0x04B0, 
            0x3849, 
            0x0A, 
            0x0A, 
            0x0C00, 
            0x0C00
        }, 

        Package (0x06)
        {
            0x044C, 
            Zero, 
            0x0A, 
            0x0A, 
            0x0B00, 
            0x0B00
        }, 

        Package (0x06)
        {
            0x03E8, 
            Zero, 
            0x0A, 
            0x0A, 
            0x0A00, 
            0x0A00
        }, 

        Package (0x06)
        {
            0x0384, 
            Zero, 
            0x0A, 
            0x0A, 
            0x0900, 
            0x0900
        }, 

        Package (0x06)
        {
            0x0320, 
            Zero, 
            0x0A, 
            0x0A, 
            0x0800, 
            0x0800
        }, 

        Package (0x06)
        {
            0x02BC, 
            Zero, 
            0x0A, 
            0x0A, 
            0x0700, 
            0x0700
        }
    })
    Method (ACST, 0, NotSerialized)
    {
        Debug = "Method _PR_.CPU0.ACST Called"
        Debug = "CPU0 C-States    : 29"
        Return (Package (0x06)
        {
            One, 
            0x04, 
            Package (0x04)
            {
                ResourceTemplate ()
                {
                    Register (FFixedHW, 
                        0x01,               // Bit Width
                        0x02,               // Bit Offset
                        0x0000000000000000, // Address
                        0x01,               // Access Size
                        )
                }, 

                One, 
                Zero, 
                0x03E8
            }, 

            Package (0x04)
            {
                ResourceTemplate ()
                {
                    Register (FFixedHW, 
                        0x01,               // Bit Width
                        0x02,               // Bit Offset
                        0x0000000000000010, // Address
                        0x03,               // Access Size
                        )
                }, 

                0x03, 
                0xCD, 
                0x01F4
            }, 

            Package (0x04)
            {
                ResourceTemplate ()
                {
                    Register (FFixedHW, 
                        0x01,               // Bit Width
                        0x02,               // Bit Offset
                        0x0000000000000020, // Address
                        0x03,               // Access Size
                        )
                }, 

                0x06, 
                0xF5, 
                0x015E
            }, 

            Package (0x04)
            {
                ResourceTemplate ()
                {
                    Register (FFixedHW, 
                        0x01,               // Bit Width
                        0x02,               // Bit Offset
                        0x0000000000000030, // Address
                        0x03,               // Access Size
                        )
                }, 

                0x07, 
                0xF5, 
                0xC8
            }
        })
    }

    Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
    {
        Debug = "Method _PR_.CPU0._DSM Called"
        If ((Arg2 == Zero))
        {
            Return (Buffer (One)
            {
                 0x03                                             // .
            })
        }

        Return (Package (0x02)
        {
            "plugin-type", 
            One
        })
    }
}

Scope (\_PR.CPU1)
{
    Method (APSS, 0, NotSerialized)
    {
        Debug = "Method _PR_.CPU1.APSS Called"
        Return (\_PR.CPU0.APSS)
    }

    Method (ACST, 0, NotSerialized)
    {
        Debug = "Method _PR_.CPU1.ACST Called"
        Debug = "CPU1 C-States    : 7"
        Return (Package (0x05)
        {
            One, 
            0x03, 
            Package (0x04)
            {
                ResourceTemplate ()
                {
                    Register (FFixedHW, 
                        0x01,               // Bit Width
                        0x02,               // Bit Offset
                        0x0000000000000000, // Address
                        0x01,               // Access Size
                        )
                }, 

                One, 
                0x03E8, 
                0x03E8
            }, 

            Package (0x04)
            {
                ResourceTemplate ()
                {
                    Register (FFixedHW, 
                        0x01,               // Bit Width
                        0x02,               // Bit Offset
                        0x0000000000000010, // Address
                        0x03,               // Access Size
                        )
                }, 

                0x02, 
                0x94, 
                0x01F4
            }, 

            Package (0x04)
            {
                ResourceTemplate ()
                {
                    Register (FFixedHW, 
                        0x01,               // Bit Width
                        0x02,               // Bit Offset
                        0x0000000000000030, // Address
                        0x03,               // Access Size
                        )
                }, 

                0x03, 
                0xC6, 
                0xC8
            }
        })
    }
}

Scope (\_PR.CPU2)
{
    Method (APSS, 0, NotSerialized)
    {
        Debug = "Method _PR_.CPU2.APSS Called"
        Return (\_PR.CPU0.APSS)
    }

    Method (ACST, 0, NotSerialized)
    {
        Return (\_PR.CPU1.ACST ())
    }
}

Scope (\_PR.CPU3)
{
    Method (APSS, 0, NotSerialized)
    {
        Debug = "Method _PR_.CPU3.APSS Called"
        Return (\_PR.CPU0.APSS)
    }

    Method (ACST, 0, NotSerialized)
    {
        Return (\_PR.CPU1.ACST ())
    }
}

}

banhbaoxamlan commented 4 years ago

by the way this is my i3-3120M SSDT-PM.aml.

thanks, I will add this ^^

13631181823 commented 4 years ago

i have a question，so i just ask in this report directly , can we use this oc0.61 boot win10 or use bootcamp ? tks for u hardworking .

banhbaoxamlan commented 4 years ago

i have a question，so i just ask in this report directly , can we use this oc0.61 boot win10 or use bootcamp ? tks for u hardworking .

Yes, u can use OC boot Windows 10, btw I recomend use F12 Boot Menu