jin
commented
4 years ago I found some projects for this:
https://github.com/cpehle/rules_verilog https://github.com/kkiningh/rules_verilator
Generally speaking, Bazel language support come in the form of Starlark rules, which exist externally to the core build system. Anyone can write these rules, including yourself! We will not be extending the core build system with language specific features as it's not really scalable or maintainable that way, as compared to building and iterating on Starlark build APIs for rule developers to construct language-specific logic.
If you've given rule development a shot and ran into Starlark limitations, please let us know about the concrete requests or bugs. Thanks!
Description of the problem / feature request:
What are the plans for supporting HDL languages in Bazel?
Feature requests: what underlying problem are you trying to solve with this feature?
Currently no modern build systems seem to exist targeting HDL languages such as (System)Verilog and VHDL. Is this something which is on the roadmap of Bazel (or which it is already used for)?
Implementing support for these languages (and their toolchains), might not be straightforward since the followed compile flow is often not similar to any other programming languages.
The compile flow of (for instance) commercial simulators such as VCS or QuestaSim involves compiling multiple targets (source files) into shared libraries binaries. The libraries can be mixed-language (containing SystemVerilog, Verilog, VHDL, C or SystemC code). These binaries are then provided to the tool, which extracts the design internally from these shared libraries.
Is this something which Bazel could support or does this flow collide with the design of the tool? What would be the areas that need to be reimplemented to support such a specific flow?